Modern integrated circuit technology typically involves the formation of die of operational circuitry formed on a wafer of semiconductor material. Referring to FIG. 1, one or more dies 2 may be formed in a conventional manner on a wafer 4, which is formed from a semiconductor material such as silicon. The dies 2 are integrated circuits or devices that have been formed but have not been detached from the wafer 4. For clarity, only one row of dies 2 is shown, but it will be understood that generally multiple rows and columns of dies 2 are formed to substantially fill the wafer 4. Each die 2 includes an active portion 1 surrounded by an inactive portion 3. The active portion 1 includes the integrated circuitry of the die. Typically, no integrated circuitry is formed in the inactive portion 3. A plurality of input bond pads 6 typically is formed on the active portion 1 of die 2 and is connected to the integrated circuitry of the die. The dies are separated by a spacing 8 referred to as the “scribe”. The scribe is formed of a non-conducting material that forms wafer 4 and typically has a width in the range of about 700 to about 900 microns, although scribe 8 can have any width suitable for isolating adjacent die. No integrated circuits are formed in the scribe.
During a typical wafer test procedure, such as during wafer-level burn-in testing, conventional testing apparatus (not shown) are used to electrically test the dies 2 while still on the wafer 4. The testing apparatus includes mechanical probes that physically contact the metal input bond pads 6 of the dies 2. The input bond pads 6 provide a connection for the input of electrical signals to the integrated circuitry formed on the die and also provide a connection point for testing the integrated circuitry formed on the die. A limitation associated with such a wafer test procedure is that the input bond pads 6 may be too small to be suitably accessible by the mechanical probes of the testing apparatus. For example, input bond pads 6 typically are square in shape and may be as small as only 105 microns on each side. Another limitation associated with such a wafer test procedure is that the input bond pads 6 may be situated on the wafer so as to be difficult to access by the testing apparatus.
Accordingly, there is a need for a method for forming a die on a wafer wherein the die can be accurately tested before the die is separated from a wafer. There is a further need for a die assembly for forming a die on a wafer wherein the die assembly is configured to permit accurate testing of the die before the die is separated from the wafer.